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topics. Candidates should have some experience working with FPGAs as well as an understanding of computer networks. Experience with both RTL and HLS design is favoured. The ideal candidate would have some
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-level layer implementations - extend hardware developments to use near-FPGA DDR and HBM memories - create functional demos using networks of interest (Yolo, Resnets, LLMs, ...) - create proof-of-concept
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include the development and implementation of control algorithms on FPGA platforms, experimental testing using Hardware-in-the-Loop (HIL) setups, data analysis, and preparation of scientific publications
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Job Title: Research Associate / Research Fellow in FPGA Systems Design (SPEAR Centre) Department/School: School of Computing, Engineering & Intelligent Systems Campus: Derry~Londonderry campus
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coarse grained reconfigurable arrays (CGRAs), virtualisation of FPGAs using partial reconfiguration, and accelerator support for machine learning. Postdocs at KAUST enjoy generous salaries and free
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) Rapid Prototyping (3D printing, Raspberry Pi, FPGA) Electrode patterning and cleanroom fabrication techniques Good team player with strong interpersonal skills Entry level applicants will also be
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the following areas: Matlab and/or Python proficiency for data processing PCB designing and/or microprocessor programming (ARM) Rapid Prototyping (3D printing, Raspberry Pi, FPGA) Optional experience
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platforms, including embedded and edge computing environments (e.g., Jetson, Raspberry Pi, FPGA, neuromorphic chips) Publish results in top-tier journals and present at leading international conferences and
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techniques enabling full duplex or simultaneous communication–sensing operation Implement the proposed techniques on the 6GSPACE Lab testbeds (SDR/FPGA/RFSoC based platforms and NTN channel emulators
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, depending on your skills, integrating hardware accelerators (FPGA) into "Hardware-in-the-Loop" simulations. Finally, you will actively participate in the scientific dissemination of the work through the