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-level layer implementations - extend hardware developments to use near-FPGA DDR and HBM memories - create functional demos using networks of interest (Yolo, Resnets, LLMs, ...) - create proof-of-concept
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transceiver design Hardware & waveform design: Reconfigurable intelligent surfaces, flexible antennas, power amplifiers, 6G waveform design including Orthogonal-Time Frequency Space modulation and Discrete
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IT4Innovations National Supercomputing Center, VSB - Technical University of Ostrava | Czech | about 1 month ago
research, development, and innovation centre active in the fields of High-Performance Computing (HPC), Data Analytics (HPDA), Artificial Intelligence (AI), and Quantum Computing (QC) and their applications
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edge AI hardware/software. Contribute to designing and evaluating scheduling algorithms for virtualized or distributed AI resources under varying load, latency, and failure conditions. Build and test a
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12 Dec 2025 Job Information Organisation/Company CIC nanoGUNE Department Quantum Hardware Research Field Physics Researcher Profile First Stage Researcher (R1) Positions PhD Positions Country Spain
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++, Python, and JavaScript languages, multi- and many-core SoC, RISC-V, hardware synthesis, hardware-software co-design, (meta-heuristic) optimization algorithms, machine learning frameworks, (bonus topics
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at Spacecraft Anatomy (SA) to gain industrial experience in space hardware manufacturing and qualification. The project will deliver a E-sail payload prototype design and strengthen the technological foundation
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partners in France, Portugal, Finland, Germany, and Spain. Responsibilities: As a PhD student hosted at Universitat Oberta de Catalunya (UOC), you will: Design and implement ambient backscatter communication
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area of power systems with special interest in power system controls, protection, optimization, and AI/ML applications in power and energy systems. Experience with experiments and hardware-in-the-loop is
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Agreement for the Recovery and Resilience Plan (PRR), funded by the European Union, signed between Universidade Nova de Lisboa and the Direção Geral do Ensino Superior, under Order No. 11888-B/2021, of 30