Research Studentships (for students of a course that does not award an academic degree) - IST/2025/BL46

26 Nov 2025
Job Information

Organisation/Company

Instituto Superior Técnico

Department

Direção de Recursos Humanos

Research Field

Engineering » Electronic engineering

Researcher Profile

First Stage Researcher (R1)

Positions

Master Positions

Country

Portugal

Application Deadline

4 Dec 2025 - 23:59 (Europe/Lisbon)

Type of Contract

Not Applicable

Job Status

Not Applicable

Offer Starting Date

27 Nov 2025

Is the job funded through the EU Research Framework Programme?

Other EU programme

Is the Job related to staff position within a Research Infrastructure?

No

Offer Description

Objectives
Development of a methodology for designing asynchronous circuits using Workcraft software, based on Signal Transition
Graphs (STG). The objective is to generate the STG description from a state and transition diagram and/or Verilog
description.

Work Plan
- Become familiar with the design flow in Workcraft
- Become familiar with Signal Transition Graph (STG) design
- Become familiar with specifying state machines in Verilog
- Define a methodology for generating STGs from state machines specified in Verilog

Duration: 12 months, not renewed

Contest Procedure
Applications must be exclusively submitted on the
admissions platform
of the
Instituto Superior Técnico
at
https://fenix.tecnico.ulisboa.pt/fenixedu-admissions  
and requires registration and validation of the candidate's identity.
Applications are only accepted when the form available in the platform is correctly filled, submitted and locked withoutany validation errors. The mandatory documentation to submit in the scholarship aplication includes:
Curriculum Vitae
Proof of Qualifications (or declaration of honor in case you do not yet have the certificate)
Proof of Registration/Enrolment
Motivation Letter
The application submission deadlines can be viewed in the admissions platform.
The results of the contest will be made available in the same admissions platform.

Where to apply

Website

https://fenix.tecnico.ulisboa.pt/fenixedu-admissions

Requirements

Research Field

Engineering » Electronic engineering

Education Level

Master Degree or equivalent

Skills/Qualifications

Admission Requirements
Having a completed master's degree and experience in the design of asynchronous circuits.
Being enrolled in a course that does not confer an academic degree

Additional Information
Benefits

Monthly Maintenance Allowance: €1309.64
Funding Entity: European Union (EU)

Eligibility criteria

Admission Requirements
Having a completed master's degree and experience in the design of asynchronous circuits.
Being enrolled in a course that does not confer an academic degree

Selection process

Contest Evaluation Method(s)
Curricular evaluation weighted to 100% on a scale of 100 points with a minimum of 60 points needed for admission.
Conditions for the Contest Evaluation
Analysis of prior experience in asynchronous circuit design. (40%)Analysis of grades obtained in curricular units relevant to the work to be developed. (40%)Analysis of the candidate's motivation. (20%)
Composition of the Selection Jury
Jury President:
Marcelino Bicho dos Santos (ist13261)
Jury Members:
Jorge Manuel Dos Santos Ribeiro Fernandes (ist13276); Fernando Manuel Duarte Gonçalves(ist13142).
In case the president of the jury is unable to preside, they will be replaced by one of the jury members

Additional comments

Workplace: Scientific Area of Eletronics

Website for additional job details

https://drh.tecnico.ulisboa.pt/bolseiros/recrutamento/

Work Location(s)

Number of offers available

1

Company/Institute

IST

Country

Portugal

Geofield

Contact

City

Lisboa

Website

http://tecnico.ulisboa.pt/

Street

Av. Rovisco Pais

Postal Code

1049-001 Lisboa

STATUS: EXPIRED

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