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reliability through systematic validation methods. CAVECORE combines cutting-edge research in AI-enabled robotics with novel evaluation frameworks aligned with EU AI Act requirements. More information: https
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and hardware for future neuromorphic systems. You will also gain profound experience in research-software engineering by actively participating in the developer community of the leading simulation code
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, including hardware interlocks Ability to work independently and collaboratively in multidisciplinary teams, including engineers, scientists, and technical staff. Knowledge is expected in the following areas
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: Investigate and design optimal computing and communication architectures for hardware acceleration of large-scale machine learning workloads Perform characterization and modeling of electronic and optical
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the 01.04.2026 at the following conditions: 50% = 19,92 hours Pay grade 13 TV-L limited by 31.10.2028 Your tasks: Contribution to the research project WISES Develop reconfigurable hardware
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, as a doctoral researcher, will: Explore energy–delay efficient unconventional computing architectures through both simulation and experimental prototyping Perform iterative hardware–algorithm co-design
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in cancers of unknown primary (CUP). Your Role You will join Subproject 3 (Model Alignment and Optimization), led by PD Dr. Keno Bressem (https://scholar.google.com/citations?user=wIEgwbkAAAAJ&hl=en
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-hardware Your Profile: Master and subsequent PhD degree in (astro-)physics, computer science, engineering, or other related fields, with a strong focus on numerical simulations Experience in the development
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on massively parallel hardware architectures Combination of programmable logic, tensor processors and general-purpose CPUs for real-time adaption and scheduling services (e.g., AMD Versal platform
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assisted ISAC framework available at the TUM ACES Lab. ▪ Conducting real world experiments to analyze performance deviations between theoretical models, software simulations, and hardware behavior. ▪ Working