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with a strong academic background in Machine learning, Natural Language Processing, and/or Software Development. Applicants with an experience in one or more of the above academic fields are encouraged
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Information Selection process La selección de los candidatos que cumplan con los requisitos de titulación se basará en la puntuación de aspectos relativos a la experiencia de los candidatos relacionada con las
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. LanguagesSPANISHLevelExcellent LanguagesENGLISHLevelExcellent Research FieldMedical sciences » MedicineComputer science » Computer architectureEngineering » Biomedical engineeringYears of Research Experience1 - 4 Additional
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knowledge of regulatory frameworks for innovation, data protection, and research ethics. LanguagesENGLISHLevelExcellent Research FieldComputer science » Computer systemsEngineering » Communication
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7 Jan 2026 Job Information Organisation/Company UNIVERSIDAD POLITECNICA DE MADRID Department HRS4R Research Field Engineering » Computer engineering Researcher Profile First Stage Researcher (R1
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habilidades: 0 - 2 Entrevista personal: 0 - 2 Education: 0 - 2 IT skills: 0 - 4 English: 0 - 2 Other skills: 0 - 2 Personal interview: 0 - 2 Selection process Se aplican las pautas establecidas en el proceso de
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relacionadas con el proyecto. In-person and online physical exercise sessions with pregnant women, at hospital facilities in Madrid and Barcelona. Storage and processing of clinical and physical activity data
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prototyping processes. Specific Requirements - Conocimientos de lenguajes de programación (MongoDB, MySQL, Weka, Phyton, Java, Matlab, R, HTML, CSS, JavaScript/jQuery ). - Manejo avanzado de diseño UX/UI y
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activities. • Management of public procurement processes and purchases related to R&D projects. • Organization and administrative management of training seminars for company executives and technical staff
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on design of mixed-signal circuits. - Valuable Knowledge of comercial design tools like Cadence / Synopsys. - Competence in computer architectures and digital system design with HDLs (Verilog or VHDL