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Job description - Developing device-to-architecture level models of emerging nanoscale devices (spintronic, resistive, or hybrid) for in-memory and neuromorphic computing. - Exploring hardware-level
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If this opportunity interests you and you'd like to know more—or if you're unsure whether your experience is the right fit—we encourage you to contact the supervisor directly: Prof. R. J. Hicken at 44‑1392‑264153
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