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semiconductor device fabrication techniques, including lithography, CVD, dry and wet etching, metallisation and CMP processes. Close interaction with facility users, equipment engineers, suppliers and academic
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and patterning technologies, including EUV lithography, electron beam lithography, and directed self-assembly - Advanced semiconductor materials processing (e.g., epitaxy, atomic layer deposition, and
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Łukasiewicz Research Network - Institute of Microelectronics and Photonics | Poland | about 1 month ago
Electrical and structural characterization of devices Operation of technological equipment, including: Photolithography and laser lithography systems Plasma etching reactors Wet oxidation furnace Scanning
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the exfoliation and stacking of 2D materials into van der Waals heterostructures, the nanofabrication of devices (thin film deposition, electron-beam lithography, etching), and magnetotransport measurements (under
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supplies Purchase equipment Purchase printmaking supplies for West Crib Organization of supplies Maintain and repair equipment and classroom supplies. Etching, lithography, screen, and Vandercook presses Hot
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etching, photolithography, electron beam lithography, etc, to develop and fine tune recipes and to fabricate proof of concept samples. Perform scheduled and unscheduled maintenance works on some laboratory
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Entitlement: 33 days annual leave, plus 9 buildings closed days for all full time staff. Use our total rewards calculator: https://www.hw.ac.uk/about/work/total-rewards-calculator.htm to see the value
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. The Centre collaborates with over 90 national and international universities and research institutes and partners across 28 countries. Its key capabilities include plasma processing, electron beam lithography
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lithography and/or atomic layer deposition and/or gate dielectric characterization methods will be considered favorably. Dutie and Responsibilities Develop, operate, and characterize semiconductor device
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steps needed during lithography and pattern transfer during the devices microfabrication. Exclusion factors: Candidates without proven experience of at least 18 months in multilevel sensor design