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leverage the power of field-programmable gate arrays (FPGA) to deploy machine learning models on the edge with low latency and high energy efficiency. This added intelligence will enable the rapid evaluation
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Programmable Gate Array (FPGA) hardware technologies i.e. OpenFPGA. Number Of Awards 1 Start Date 1st October 2026 Award Duration 4 Years Sponsor EPSRC Supervisors Tousif Rahman Rishad Shafik Alex Yakovlev
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into the co-design of ultra-low-power AI hardware architectures tailored for edge computing applications. The research aims to develop neuromorphic processors, FPGA/ASIC-based AI accelerators, and intelligent
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(especially neuromorphic) device, circuit and system design, clean-room fabrication, ferroelectric (or antiferroelectric) materials and devices, memristors, tactile sensors, FPGA/MCU/API development, machine