Sort by
Refine Your Search
-
programmable gate arrays (FPGAs), hardware description languages (e.g. VHDL or Verilog), high-level synthesis (HLS), artificial intelligence and/or machine learning We offer you an excellent working environment
-
Qualifications: PhD in Electrical and/or Computer Engineering or closely related fields, with demonstrated knowledge and expertise in FPGA Design and signal processing Demonstrated experience with VHDL Hardware
-
to prevent risks and issues, and mitigate those that emerge. Analyze FPGA hardware and software interface specifications described via VHDL or Verilog to ensure it meets system requirements. Analyze software
-
UltraScale+ RFSoC, Altera Cyclone SoC); Good knowledge of C/C++ and familiarity with Verilog/VHDL HDL and communication between FPGA and CPU cores. The experiment control and automation of routine experimental
-
to comprehensive activities in basic research as well as applied research in the fields of Nanoscience & Microsystems Engineering and Semiconductor Devices and Circuits along with knowledge and experience in VHDL
-
prohibited from hiring employees to perform CSU-related work outside California. Working in the State of California is a condition of employment. Preferred qualifications: Teaching experience with VHDL
-
using a hardware description language (such as VHDL), test bench development, and implementation of advanced digital design systems in the laboratory component. Minimum qualifications: A master's degree
-
, methodologies, tools, and techniques to prevent risks and issues, and mitigate those that emerge. Analyze FPGA hardware and software interface specifications described via VHDL or Verilog to ensure it meets
-
that emerge. Analyze FPGA hardware and software interface specifications described via VHDL or Verilog to ensure it meets system requirements. Analyze software test and evaluation techniques and methodologies
-
techniques to prevent risks and issues, and mitigate those that emerge. Analyze FPGA hardware and software interface specifications described via VHDL or Verilog to ensure it meets system requirements. Analyze