Sort by
Refine Your Search
-
Listed
-
Category
-
Country
-
Employer
- Fraunhofer-Gesellschaft
- Austrian Academy of Sciences, The Human Resource Department
- Delft University of Technology (TU Delft); yesterday published
- Eindhoven University of Technology (TU/e)
- TU Dresden
- Universidade de Vigo
- University of Antwerp
- University of Southern Denmark
- Université de Bordeaux - Laboratoire IMS
-
Field
-
the professional field. (punctuation: 30) Item 02: Specific SW and HW merits: (1) Proven experience in programming with software development languages such as C, VHDL, Python, etc., in aerospace and defense
-
Engineering with excellent grades. Knowledge of Digital/Mixed-Signal Integrated Circuit (IC) design and Computer Architecture. Solid skills in HDL (Verilog, VHDL) and scripting languages (Python, TCL
-
of embedded machine learning, neuromorphic hardware and deep learning accelerators. Want to get more information? Click here. What you will do Responsible for RTL design (VHDL, Verilog) of digital blocks and
-
++ programming languages and data analysis techniques General knowledge of microelectronics and FPGAs (VHDL or Verilog) is desirable Knowledge in radiation physics and dosimetry Interdisciplinary collaboration
-
field. Solid background in digital IC design and digital signal processing. Hands-on RTL design skills (SystemVerilog / Verilog / VHDL) plus scripting (Python / MATLAB / C/C++). Strong command of English
-
intelligence and hardware implementation, the candidate should have a strong background in at least some of these topics. VHDL Programming skills are also required. Additional Information Work Location(s) Number
-
to an international team a strong background in one or more of the following areas: field programmable gate arrays (FPGAs), hardware description languages (e.g. VHDL or Verilog), high-level synthesis (HLS), artificial
-
., GNURadio, Matlab, LabView), and/or FPGA development (e.g., VHDL) is a plus. You are a team player and have strong communication skills. You have a high proficiency in oral and written English. You comply
-
of embedded machine learning, neuromorphic hardware and deep learning accelerators. Want to get more information? Click here. What you will do Responsible for RTL design (VHDL, Verilog) of digital blocks and
-
Experience with VLSI design (Cadence tools, Verilog/VHDL, SPICE) Knowledge of neural networks and neuromorphic systems is a strong advantage Good programming skills (e.g., Python, MATLAB) and interest in