Sort by
Refine Your Search
-
Country
-
Employer
- Carnegie Mellon University
- Pennsylvania State University
- National University of Singapore
- ;
- California State University San Marcos
- Princeton University
- UNIVERSITY OF SURREY
- Fraunhofer-Gesellschaft
- Georgia Southern University
- Lawrence Berkeley National Laboratory
- Oak Ridge National Laboratory
- Radix Trading LLC
- Sam Houston State University
- Texas A&m Engineering
- The University of Queensland
- University of California
- University of San Francisco
- University of Southern California
- University of Surrey
- Virginia Tech
- 10 more »
- « less
-
Field
-
FPGA hardware and software interface specifications described via VHDL or Verilog to ensure it meets system requirements. Analyze software test and evaluation techniques and methodologies. Analyze static
-
mitigate those that emerge. Analyze FPGA hardware and software interface specifications described via VHDL or Verilog to ensure it meets system requirements. Analyze software test and evaluation techniques
-
that emerge. Analyze FPGA hardware and software interface specifications described via VHDL or Verilog to ensure it meets system requirements. Analyze software test and evaluation techniques and methodologies
-
interface specifications described via VHDL or Verilog to ensure it meets system requirements. Analyze software test and evaluation techniques and methodologies. Analyze static, dynamic and complexity
-
FPGA hardware and software interface specifications described via VHDL or Verilog to ensure it meets system requirements. Analyze software test and evaluation techniques and methodologies. Analyze static
-
mitigate those that emerge. Analyze FPGA hardware and software interface specifications described via VHDL or Verilog to ensure it meets system requirements. Analyze software test and evaluation techniques
-
, or related field. You have proficiency in one or more of the following: C, C++, VHDL, Verilog, Python, C#. You’ve built, analyzed, debugged, and/or tested bare-metal systems and are familiar with a CMSIS/HAL
-
verbal communication skills. Experienced professional with expertise in RTL design (Verilog, SystemVerilog, VHDL), IP integration, simulation, timing closure, and hardware deployment. Proficient in C/C
-
, or Matlab/Octave. Strong written and verbal communication skills. Experienced professional with expertise in RTL design (Verilog, SystemVerilog, VHDL), IP integration, simulation, timing closure, and hardware
-
experience includes using MATLAB, GNU Radio, HDL Coder, REDHAWK, XMIDAS, VHDL/Verilog, C++, and/or Python for RF spectrum access applications. (2) Foundation in quantum mechanics, with additional emphases