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design and development, with a strong understanding of Verilog, SystemVerlilog and other HDLs. Extensive experience in embedded software development, including C/C++/Rust programming for real-time
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. Demonstrated programming experience in Python and C/C++ or Verilog, SystemVerilog. Excellent oral and written communication skills. Ability to work productively independently and collaboratively as part of a
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accelerator applications, especially storage ring lattice and orbit control. Proficient in RTL design (Verilog/SystemVerilog/VHDL), IP integration, simulation, timing closure, and FPGA deployment. Skilled in C
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