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Python and/or MATLAB; familiarity with HDL (VHDL/Verilog) and FPGA design tools, e.g. Xilinx Vivado, Viti, is considered a plus Previous involvement in ESA, EU or other publicly funded research projects
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, or nanoscale devices Device or circuit modeling (SPICE, Verilog-A, or equivalent) VLSI/architecture (or, Spintronic-CMOS) design for AI systems Hardware-based security primitives Communication and/or language
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