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Field
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accelerator applications, especially storage ring lattice and orbit control. Proficient in RTL design (Verilog/SystemVerilog/VHDL), IP integration, simulation, timing closure, and FPGA deployment. Skilled in C
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to an international team a strong background in one or more of the following areas: field programmable gate arrays (FPGAs), hardware description languages (e.g. VHDL or Verilog), high-level synthesis (HLS), artificial
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Engineering, or Computer Science, with relevant industrial or academic experience in digital hardware design, system modeling, and/or uArchitecture research. You are experienced in RTL design flows (Verilog
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programmable gate arrays (FPGAs), hardware description languages (e.g. VHDL or Verilog), high-level synthesis (HLS), artificial intelligence and/or machine learning We offer you an excellent working environment
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hardware design (Verilog/VHDL), FPGA-based acceleration, etc. Experience with deep learning frameworks like PyTorch, Keras, or TensorFlow, and tools such as Jupyter Notebook, is expected. A strong foundation
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with software such as Altium, Eagle, KiCad etc are a plus. Knowledge in the operation and control of switched power converters of any kind. Programming skills (VeriLog, C++, Matlab, Simulink). Experience
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to prevent risks and issues, and mitigate those that emerge. Analyze FPGA hardware and software interface specifications described via VHDL or Verilog to ensure it meets system requirements. Analyze software
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UltraScale+ RFSoC, Altera Cyclone SoC); Good knowledge of C/C++ and familiarity with Verilog/VHDL HDL and communication between FPGA and CPU cores. The experiment control and automation of routine experimental
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or Verilog Programming for Xilinx, or an engineering class Electrical Engineering industry or research experience Experience with ABET reporting Demonstrated commitment to actively engaging undergraduates in
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, information technology or comparable with a master's or diploma degree Good knowledge in analog circuit design methodologies and signal integrity analysis Fundamental expertise in working with Verilog AMS