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dynamic team composed by young talented scientists and technical experts, working in a highly attractive and international environment (English is the formal working language at the CyI). The ideal
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experience in FPGA-based system development (synthesis, simulation, timing closure, and validation). • Solid understanding of EDA tools (i.e. Vivado, Quartus, ModelSim), and hardware–software co-design methods
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26 Sep 2025 Job Information Organisation/Company University of Cyprus Research Field Engineering » Electrical engineering Researcher Profile First Stage Researcher (R1) Positions PhD Positions
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. The selected faculty applicant will enhance the competencies of the Institute in one or more of the following research areas: Foundation models and efficient training/adaptation methods on HPC systems
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(R1) Recognised Researcher (R2) Established Researcher (R3) Leading Researcher (R4) Positions PhD Positions Country Cyprus Application Deadline 30 Nov 2025 - 12:59 (Europe/Athens) Type of Contract
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14 Nov 2025 Job Information Organisation/Company University of Cyprus Research Field Other Researcher Profile Recognised Researcher (R2) Established Researcher (R3) Positions PhD Positions Country
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21 Nov 2025 Job Information Organisation/Company University of Cyprus Research Field Other Researcher Profile Recognised Researcher (R2) Established Researcher (R3) Positions PhD Positions Country
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3 Nov 2025 Job Information Organisation/Company University of Cyprus Research Field Other Researcher Profile Recognised Researcher (R2) Established Researcher (R3) Positions PhD Positions Country
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Stage Researcher (R1) Recognised Researcher (R2) Positions PhD Positions Country Cyprus Application Deadline 1 Dec 2025 - 00:00 (Europe/Athens) Type of Contract Permanent Job Status Full-time Hours Per
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(R1) Recognised Researcher (R2) Established Researcher (R3) Leading Researcher (R4) Positions PhD Positions Country Cyprus Application Deadline 30 Nov 2025 - 12:59 (Europe/Athens) Type of Contract