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Open Date for Applications: November 11th, 2025 Closing Date for Applications: December 2nd, 2025, 23h00m (Lisbon Time) Key words: #CMOS #mixedsignaldesign #ICdesign #PDKs Overview The Piteira Research
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management skills. Strong interpersonal and mentoring skills. Advocate for safety and ethics in the workplace. Preferred: Experience with integrated CMOS circuit design, verification, and tapeout in standard
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Inria, the French national research institute for the digital sciences | Paris 15, le de France | France | 19 days ago
scholar will be working in the Inria-AIO team (https://team.inria.fr/aio/ ) at the Paris center, in the heart of the city in the 13th arrondissement. The GAIA project aims to design electronics for a
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focus on the 7–20 GHz frequency range and will involve both RFIC/CMOS and MMIC implementations. You will have access to state-of-the-art semiconductor technologies and world-class measurement facilities
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large polarization, high thermal stability, and CMOS compatibility, opening the way to their integration in future III-nitride electronic and memory platforms. The project involves advanced epitaxy, in
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CMOS technology can be employed for optimization of the transparency of the Schottky barrier and for promoting performance of Josephson field-effect transistors (JoFETs). With sufficient coherence
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) Rewards and Benefits: 33 days annual leave, plus 9 buildings closed days for all full time staff (Part time workers should pro rata this by their FTE). Use our total rewards calculator: https://www.hw.ac.uk
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performant, CMOS compatible, infrared colloidal quantum dot photodetectors and light emitters exploiting intersubband transitions. The project is focused in the mid and long wave infrared employing colloidal
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methods for the design, verification, and test of circuits and systems for conventional as well as alternative and post-CMOS computing technologies. Besides that, we have successfully applied the methods