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architectures for explainable dual-process computation Design and development of deep neural network architectures and algorithms for the implementation of dual process computation approaches that improve
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17 Sep 2025 Job Information Organisation/Company INESC ID Research Field Engineering » Computer engineering Researcher Profile First Stage Researcher (R1) Positions Bachelor Positions Country
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17 Sep 2025 Job Information Organisation/Company INESC ID Research Field Engineering » Computer engineering Researcher Profile First Stage Researcher (R1) Positions Bachelor Positions Country
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the selection process, under the terms of the aforementioned diploma. Where to apply E-mail bolsas@inesc-id.pt Requirements Research FieldEngineering » Computer engineeringEducation LevelBachelor Degree
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the selection process, under the terms of the aforementioned diploma. Where to apply E-mail bolsas@inesc-id.pt Requirements Research FieldEngineering » Computer engineeringEducation LevelBachelor Degree
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26 Aug 2025 Job Information Organisation/Company INESC ID Research Field Engineering » Computer engineering Researcher Profile First Stage Researcher (R1) Positions Master Positions Country Portugal