1,160 algorithm-development-"The-University-of-Edinburgh"-"The-University-of-Edinburgh" positions in Netherlands
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on the theoretical and algorithmic development of control methods that combine physical modeling and real-time computation. The work will involve deriving reduced-order models, designing controllers that exploit
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of the chair group. The new chair of the Bioinformatics Group should bring deep expertise in software/algorithm development and multi-omics data integration, combined with applications in the domain
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nature. The PhD candidate will focus on the theoretical and algorithmic development of control methods that combine physical modeling and real-time computation. The work will involve deriving reduced-order
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3 Sep 2025 Job Information Organisation/Company University of Amsterdam (UvA) Research Field Computer science » Informatics Computer science » Programming Mathematics » Algorithms Mathematics
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new generation of perceptual foundation models by contributing advanced perceptual pre-training and fine-tuning algorithms. What you will do You will carry out research and development in the areas
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-tuning algorithms. What you will do You will carry out research and development in the areas of perceptual foundation models, using advances in deep machine learning and computer vision. The goal is to
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of EU digital and data regulation? And lead the organisation of an academic workshop and become the co-editor of a special journal issue on artificial secrecy and algorithmic transparency? How does EU law
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algorithms from medical records, improving Astronaut’s medical monitoring during missions and throughout their career; Develop automated workflow for data extraction and import; Support development
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match human expectations. It is a major challenge to develop agents and frameworks that account for uncertainty, risk and interaction in the way humans do. As human behavior depends on a tightly
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such as textiles. 2. Proven ability to develop and implement advanced motion-planning algorithms and real-time control schemes, ideally demonstrated through digital-twin simulations and hardware-in-the-loop