17 rtl "https:" positions

Administrative Lab Services Coordinator

Dana-Farber Cancer Institute | Chestnut Hill, Massachusetts | United States | 7 days ago

; assigns Real-Time Locating System (RTLS) badges; and asks patients screening questions. Prints and reviews appointment schedules for patients. Notifies nursing and lab staff of issues as needed. Answers

Technician research VLSI design - PRIMIC

Universitat de Barcelona | Spain | 25 days ago

inclusive. Where to apply Website https://t.ly/nqUtD Requirements Research FieldEngineeringEducation LevelBachelor Degree or equivalent Skills/Qualifications Strong proficiency in Verilog for RTL design and

Post-doctoral fellow in AI for Microarchitectural Security - 12 months contract

Télécom Paris | Palaiseau, le de France | France | 9 days ago

using gem5 simulator as the main execution backend for the RL agent, while also investigating the potential of RTL simulation and physical RISC-V board as complementary execution nvironments. A key aspect

Clinic Coordinator - - (Mon-Fri 8:30am-5pm

Dana-Farber Cancer Institute | Chestnut Hill, Massachusetts | United States | 3 days ago

: ? Maintains a level of competency in all systems including: Epic, Real Time Locating System (RTLS), Outlook ? Actively engaged in system upgrades and effected operational changes ? Distribution, maintenance

Patient Financial Counselor

Dana-Farber Cancer Institute | Boston, Massachusetts | United States | 18 days ago

patients are financially cleared or escalates patients to the Financial Clearance team for further review as needed. Supports DFCI initiates such as patient itinerary, RTLS badging, and requests for copy

PhD Position: Digital AI Chip Design for High Speed RF Systems

Delft University of Technology (TU Delft) | Netherlands | 25 days ago

: Translate ML-based error-correction / DPD algorithms into hardware-friendly forms (model reduction, sparsity, quantization, fixed-point design). Design the architecture and RTL of a low-power accelerator that

Researcher in framework for FPGA benchmarking of quantized neural networks - TIMA

Grenoble INP - Institute of Engineering | Grenoble, Rhone Alpes | France | about 2 months ago

- Experience with RTL languages (Verilog or VHDL), VHDL would be a plus - Proficiency with English language is highly recommended - Proficiency with French language would be a plus - Interest in technologies

Public notice for one research grant Refª BI|2026/875 Project GREENCHIPS - Refª 101123309 - 2022-SKILLS-03 Application submission from 16 to 30 of March 2026

INESC ID | Portugal | 20 days ago

of August (Scientific Research Fellow Status) in its current wording. https://diariodarepublica.pt/dr/legislacao-consolidada/lei/2004-58216179 Regulations for Research Grants of the Foundation for Science and

PhD Position in High-Performance CMOS Phase-Locked Loop Design

Delft University of Technology (TU Delft) | Netherlands | 19 days ago

: M.Sc. degree in Microelectronics, Electrical Engineering, or a closely related field. Strong background in analog, mixed-signal, and RF circuit design. Hands-on RTL design experience (SystemVerilog

PhD Position in High-Performance CMOS Receiver and Analog-to-Digital Converter Design

Delft University of Technology (TU Delft) | Netherlands | 19 days ago

. Strong background in analog, mixed-signal, and RF circuit design. Hands-on RTL design experience (SystemVerilog, Verilog, or Verilog-AMS). Demonstrable creativity and originality in problem solving and