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need you as a Digital IC Design Engineer to be part of our multidisciplinary team to: Develop and implement RTL code that meets functional, performance, and area requirements based on design
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Engineering, or Computer Science, with relevant industrial or academic experience in digital hardware design, system modeling, and/or uArchitecture research. You are experienced in RTL design flows (Verilog
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for: Test chip demonstrator definition, specifications, and planning. Physical design integration (including floorplanning) and signoff coordination at sub-system and full chip level. RTL design, IP selection
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signoff coordination at sub-system and full chip level. RTL design, IP selection and integration. Definition of the strategy for verification, measurement and characterization, including test access