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the R&D programs or to bilateral (Research on Demand) projects. You will be responsible for coordination and implementation of new ideas/concepts/flows on wafers in imec’s advanced 300mm FAB. You will
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are used in the N28 technology node. Knowledge of advanced nodes including finfet and gate all around (GAA) is a bonus. Technology Transfer activity: Strengthening the connection between R&D and the larger
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for an R&D Engineer for Die to Wafer bonding. You are member of the Bonding, Assembly and Wafer level packaging team (BAW) of the Materials, Transfer and Assembly group (MATA) which is responsible
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of the digital ASIC-design flow is required: logic synthesis, timing analysis, power simulation, logic equivalence, DFT and/or P&R. Knowledge of FPGA-development is a plus. Knowledge of low-power designs is a plus
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3D packaging to our portfolio of solutions. Backed by imec, one of the world’s leading R&D labs in nanoelectronics, IC-Link offers tailored services adapted to customer needs – from ASIC design
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at imec's R&D headquarters located in the heart of Europe and help strengthen technology and modules across imec’s many programs. This opportunity is within the BEOL PlatEff team, which drives engineering
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of novel high-speed optical transceivers. Imec is a global pioneer in developing integrated silicon photonics technology through its renowned iSiPP platform and PDK, and Optical I/O R&D program. This
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R&D hub in Leuven. Opportunities to collaborate with leading circuit designers, device experts, and integration engineers. Visibility through publications and engagements with imec’s global network
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in developing integrated silicon photonics technology through its renowned iSiPP platform and PDK, and Optical I/O R&D program. This technology is successfully offered via wafer-level prototype