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define and discuss process splits with the process step development engineers, implement the splits into the process flow, and take care of the cycle time follow up during processing in the imec pilot line
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semiconductor industry. Utilizing the deep technical expertise of imec, engage in customer collaboration to setup established technology node processes at customer foundry sites, Process Integration and
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, to strengthen the performance, stability and reliability. Work with customer collaboration to setup established technology node processes at customer sites, expanding the width of the semiconductor industry. Be
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Device Engineer, contributing to technology development and technology transfer activities for both Front End Of Line (FEOL) and Back End Of Line (BEOL) process. This role offers high visibility with focus
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/ polymers), and wafer-level processes. We deliver early-stage process specifications and device models. We validate device concepts towards novel library components that become part of imec’s PDK, available
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materials (such as Ge, GeSi, III-V, BTO, LNO, organic chromophores/ polymers), and wafer-level processes. We deliver early-stage process specifications and device models. We validate device concepts towards
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for developing processes requested by the process integration departments running imec’s CORE and CMORE programs. You work in a group of about 20 people with whom you interact daily. You will work in a dynamic
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commit to supporting and guiding you in this process; not only with words but also with tangible actions. Through imec.academy, 'our corporate university', we actively invest in your development to further
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) fabs. You make sure that Silicon Interposer, Trough Silicon Vias, Die to Wafer and Wafer to wafer process modules can be matured enough to be integrated into our manufacturing services (prototyping and
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advanced features and process innovations. Drive circuit design, simulation, verification, and layout for analog, mixed-signal, or digital blocks. Define specifications and measurement strategies for test