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on algorithmic and application research in the domain of AI and scientific simulations to drive SW-HW-Technology co-optimization and develop novel ML/Hybrid-AI methods for semiconductor processing and health
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Optimization: Define and implement process splits in collaboration with characterization and process step engineers. Analyze interactions between FEOL modules and guide development based on electrical and
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validation of breakthrough concepts and driving innovation in system and design-technology co-optimization (STCO/DTCO). What you will do Lead the architecture, design, and development of silicon demonstrators
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analysis Thermal integrity in 2.5D packaging Advanced design technology co-optimization Parasitic extraction for large cells Area-selective deposition for nanoscale structures ...and more! By bridging
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design accounting for system effects and emerging technologies What you will do In this position, you will join the imec PACTS department (Pathfinding Co-Optimization Technology and Systems), in
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development. To integrate the image processing pipeline in a modular way, building on algorithms developed by your colleagues. To optimize performance and throughput and use software engineering best practices
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during processing in imec’s advanced 300mm cleanroom. Leverage industry experience to window and corner test modules, working to establish optimal settings which work across major program families which
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. Process Integration and Optimization: Define and implement process splits in collaboration with characterization and process step engineers. Analyze interactions between FEOL modules and guide development
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on the design, optimization, and implementation of integrated quantum sensor architectures. As part of a multidisciplinary team, you will explore innovative, energy-efficient approaches to precision sensing in a