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(28nm or below) Hardware-aware modeling of state-space inference pipelines Simulation and synthesis of the architecture using EDA tools Benchmarking against transformer-based hardware accelerators Work
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environment with structured activities and informal routines that promote cross-disciplinary interaction and cultivate an inclusive, supportive atmosphere. An engaging, dynamic, and international
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, and an application must include: Motivated application. Curriculum Vitae. Master’s and bachelor’s degree certificates or equivalent, including transcripts of grades (copy of original/official English
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CMOS circuits with real or simulated qubit systems. Understand the specific requirements and constraints of interfacing with qubits (control fidelity, noise sensitivity, power dissipation, etc
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: Motivated cover letter Special PhD application form (available here ) Curriculum vitae Bachelor's and Master’s degrees or equivalent (copy of original + verified English translation) A complete list of
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(pressure, temperature, etc.) Signal conditioning and digitization for heterogeneous sensor inputs System-level validation and interfacing with SNN-based hardware What You Will Do Design, simulate, and verify
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You Will Do Design and simulate CMOS circuits for spiking neuron models Develop and validate digital/mixed-signal SNN hardware Collaborate with neuroscientists and system-level designers Contribute
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completion of the MSc. Copy of MSc thesis, if available A recommendation letter, if available (otherwise, please insert contacts for recommendations in the CV) Shortlisting may be used in the assessment