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Deadline: 30 September 2025 A fully funded four-year PhD position is available to work on the project titled “Real-world quantum verification and benchmarking of noisy hardware”. This position is a
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Deadline: 31 August 2025 A fully funded four-year PhD position is available to work on the project titled “Real-world quantum verification and benchmarking of noisy hardware”. This position is a
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Deadline: 30 June 2025 A fully funded four-year PhD position is available to work on the project titled “Real-world quantum verification and benchmarking of noisy hardware”. This position is a
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of the Hub. Our approach enhances T2 (Interconnected QC systems) through verification methods for connected networks, supports T1 (Integrated quantum demonstrators) via hardware-agnostic metrics, and enables
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of the Hub. Our approach enhances T2 (Interconnected QC systems) through verification methods for connected networks, supports T1 (Integrated quantum demonstrators) via hardware-agnostic metrics, and enables
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. Our approach enhances T2 (Interconnected QC systems) through verification methods for connected networks, supports T1 (Integrated quantum demonstrators) via hardware-agnostic metrics, and enables T3
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matrix operations, or time-domain simulations is a plus. • Knowledge of modern GPU hardware and architectures is a plus. • Experience with commercial software development and GUI development is a
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into areas such as AI-driven verification, predictive maintenance, and compliance assurance, aiming to enhance system reliability and safety. Situated within the esteemed IVHM Centre and supported by
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this testbed available to users for testing hardware and applications. NPL will lead on the testing and security evaluation of the testbed and collaborate widely on the technology development. The student’s
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Hardware-software co-simulation and benchmarking This PhD project is part of SDU microelectronic unit’s effort in neuromorphic chip design and collaborates with international partners working on spiking AI