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This project explores the use of state-space models (SSMs) for sequence modeling in large language models (LLMs), focusing on their CMOS-based hardware implementation. The PhD candidate will develop energy
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Hardware-software co-simulation and benchmarking This PhD project is part of SDU microelectronic unit’s effort in neuromorphic chip design and collaborates with international partners working on spiking AI
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Job Description Are you passionate about neuromorphic computing and hardware design? Do you want to contribute to the next generation of brain-inspired computing systems for healthcare applications
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. The broader goal is to support assistive devices through real-time analysis of brain activity and physical interaction signals using energy-efficient hardware. As a PhD candidate, your primary focus will be
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identifying suitable ultrasound technologies for muscles with varying architectures, integrating recording hardware, and establishing acquisition protocols to capture both electrical and architectural
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verification and formal verification. runtime analysis and reconfiguration of in-vehicle TSN networks. Co-supervise students. Optionally contribute to teaching. Required qualifications: Hardware design in a
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interface, and all the way to quantum algorithms and applications. The long-term mission of the programme is to develop fault-tolerant quantum computing hardware and quantum algorithms that solve life
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cryogenic electronics, CMOS behavior at cryogenic temperatures (4 K and below), and quantum hardware architectures (superconducting qubits and spin qubits). Collaborate with quantum physicists to interface
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Job Description SDU Metaverse Lab invites applications for a PhD fellowship in research and development of educational material towards implementation of programming and hardware competences in