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Field
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signal processing, and FPGA readout systems. Teach undergraduate and graduate courses related to semiconductor devices, analog electronics, signal processing, and FPGA-based systems. Mentored graduate
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contraintes strictes de consommation énergétique (quelques mW maximum) et de dissipation thermique, rendant l'utilisation des circuits conventionnels (FPGAs, DACs/ADCs) inadaptée. Les architectures actuelles
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. - Hardware acceleration for the development of Artificial Intelligence & Machine Learning techniques using FPGA or other embedded hardware accelerators. - Management, configuration and optimisation
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undergraduate students, and technical personnel at the ElectroScience Laboratory (ESL); Leads and advances research and development on systems requiring the use of Field Programmable Gate Arrays (FPGAs); designs
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Inria, the French national research institute for the digital sciences | Villeurbanne, Rhone Alpes | France | 24 days ago
develops various tools such as the Faust programming language (a DSL for Real-Time audio DSP), Syfala (a tool to facilitate the programming of FPGAs for real-time audio DSP), and FloPoCo (a generator of
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implementation, including FPGA controlling Additional Information Selection process The selection process consists of an initial evaluation of the candidates' CV, motivation letter and specific merits
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. (preferred) or M.Sc. in Electrical Engineering, Telecommunications Engineering, or a closely related field. SDR Expertise: Strong hands-on experience with SDRs (USRP, RFSoC, or equivalent). FPGA programming
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central to developing advanced safety control systems that protect people in complex, high-risk environments, while also leading software development projects that integrate PLCs, FPGAs, and EPICS into next
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for manufacture. Knowledge of FPGA development and hardware description languages such as SystemVerilog or VHDL, with experience in simulation, synthesis, and implementation considered highly desirable
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, considering discrete modulation; Contribute to the implementation of digital signal processing algorithms in a FPGA platform; Contribute to the implementation of information reconciliation algorithms in a GPU