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emerging models by collaboratively exploring various computation models leveraging physical devices properties. This PhD work will focus on FPGA devices in order to build an accelerated spiking neural
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), Department for Scalable Data Analytics and Artificial Intelligence (ScaDS.AI Dresden) the Chair of Adaptive Dynamic Systems offers a position as PhD Student / Research Associate in FPGA Design for AI
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monitoring will also be integrated into this PhD. Thermal prediction models are currently implemented on a Field Programmable Gate Array (FPGA), while the thermal PI controller (which will be further developed
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of distributed MIMO, and/or coordinated multi-AP operation (under study in the Wi-Fi 8 standardisation workgroup), using Hardware Description Language on FPGA, based on the open-source openwifi project (https
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-healthcare technologies•Security and privacy in computing systems and IoT•Intelligent wireless communications and networks•Systems-on-chip, FPGA/microcontroller design, real-time systems•Biomedical
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Reconfigurable/Spatial computing architectures, such as FPGAs, CGRAs, and AI accelerators, offer significant opportunities for improving performance and energy efficiency compared to traditional CPUs
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Low-power Network Protocols, MAC Layer protocols C/C++, Compilers, Embedded Systems (Optionally) Basic Electronics, PCBs, Circuits, FPGAs Highlights of the position Part of a Marie Skłodowska Curie
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Inria, the French national research institute for the digital sciences | Villeurbanne, Rhone Alpes | France | 2 months ago
develops various tools such as the Faust programming language (a DSL for Real-Time audio DSP), Syfala (a tool to facilitate the programming of FPGAs for real-time audio DSP), and FloPoCo (a generator of
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++ programming languages and data analysis techniques General knowledge of microelectronics and FPGAs (VHDL or Verilog) is desirable Knowledge in radiation physics and dosimetry Interdisciplinary collaboration
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, considering discrete modulation; Contribute to the implementation of digital signal processing algorithms in a FPGA platform; Contribute to the implementation of information reconciliation algorithms in a GPU