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into the co-design of ultra-low-power AI hardware architectures tailored for edge computing applications. The research aims to develop neuromorphic processors, FPGA/ASIC-based AI accelerators, and intelligent
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interested in PQC, FPGA/processor design, and aerospace cybersecurity. The candidate will join vibrant doctoral community, benefiting from world-class research facilities in the modern Dalton Building. Project
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energy-efficient CMOS blocks implementing SSM-based LLMs. Prototype hardware blocks on FPGA and prepare for ASIC tape-out. Benchmark performance and comparison with transformer accelerators. Work with
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