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Research Group at Newcastle University with next-generation Field Programmable Gate Array (FPGA) hardware technologies i.e. OpenFPGA. Number Of Awards 1 Start Date 1st October 2026 Award Duration 4 Years
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Programmable Gate Array (FPGA) hardware technologies i.e. OpenFPGA. Number Of Awards 1 Start Date 1st October 2026 Award Duration 4 Years Sponsor EPSRC Supervisors Tousif Rahman Rishad Shafik Alex Yakovlev
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) Programming skills in C/C++, Rust or other relevant low-level languages is desirable. Experience programming GPUs, FPGAs, ASICs or other specialised hardware is desirable Studentship and eligibility
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into the co-design of ultra-low-power AI hardware architectures tailored for edge computing applications. The research aims to develop neuromorphic processors, FPGA/ASIC-based AI accelerators, and intelligent