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exposing hardware accelerators, such as GPUs and FPGAs, in a seamless and portable way. This includes designing execution logic and resource-scheduling strategies that make efficient use of available
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tasks across distributed infrastructures. A key aspect of the position involves integrating and exposing hardware accelerators, such as GPUs and FPGAs, in a seamless and portable way. This includes
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engineering. The work involves simulations for quantum error correction and mid-circuit operations, and will require both low-level optimization skills (e.g., SIMD, GPU, FPGA) and an understanding of quantum
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