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), the TRR404 offers several PhD and Postdoc positions with starting dates from April 1, 2025 onwards. All vacancies can be found here: https://cfaed.tu-dresden.de/trr-vacancies . For TUD diversity is an
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of FPGA designs, including timing analysis, code coverage and coding rule checks Support FPGA integration on target hardware Create design documentation in compliance with internal and external normative
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phase (April 2025 – December 2028), the TRR404 offers several PhD and Postdoc positions with starting dates from April 1, 2025 onwards. All vacancies can be found here: https://cfaed.tu-dresden.de/trr
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of ASIC/ FPGA SoC architecture and digital design Proficiency in hardware description languages such as System Verilog, Verilog, or VHDL Programming knowledge in Python and C Experience on frontend and