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PhD Position in Parsing and Formal Representation of Geographic Questions Faculty: Faculty of Geosciences Department: Department of Human Geography and Spatial Planning Hours per week: 36 to 40
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Reconfigurable/Spatial computing architectures, such as FPGAs, CGRAs, and AI accelerators, offer significant opportunities for improving performance and energy efficiency compared to traditional CPUs
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++, etc.); experience with FPGA and ASIC design flow; A collaborative spirit for teamwork within diverse project groups; Excellent communication and presentation skills and creative thinking; Fluency in
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, Computer Science, or related field with excellent grades. Sound knowledge of computer hardware design and synthesis tools (ASIC, FPGA). Good programming and scripting skills. Excellent English communication
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design and synthesis tools (ASIC, FPGA). Good programming and scripting skills. Excellent English communication, presentation, and writing skills. Must be a team player. Knowledge of computing-in-memory is
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synthesis tools (ASIC, FPGA). Good programming and scripting skills. Excellent English communication, presentation, and writing skills. Must be a team player. Knowledge of computing-in-memory is an added
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design and synthesis tools (ASIC, FPGA). Good programming and scripting skills. Excellent English communication, presentation, and writing skills. Must be a team player. Knowledge of computing-in-memory is
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formal workweek of 38 hours. A full-time employment in practice means 40 hours a week, therefore resulting in 96 extra leave hours on an annual basis. Free access to sports facilities on campus. A family
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% of the gross annual salary, an end-of-year bonus of 8.3%, and a solid pension scheme. A minimum of 232 leave hours in case of full-time employment based on a formal workweek of 38 hours. Full-time employment in
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232 leave hours per year in case of full-time employment based on a formal workweek of 38 hours. A full-time employment in practice means 40 hours a week, therefore resulting in 96 extra leave hours on