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accelerator applications, especially storage ring lattice and orbit control. Proficient in RTL design (Verilog/SystemVerilog/VHDL), IP integration, simulation, timing closure, and FPGA deployment. Skilled in C
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PLCs, FPGAs, and EPICS into next-generation accelerator systems. Your work will help shape the future of safety engineering at Berkeley Lab and beyond, with opportunities to collaborate across DOE labs
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