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Field
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ternary neural networks using FPGA devices. The successful candidate will have significant experience in machine learning, FPGA design and an outstanding track record in conducting machine learning research
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optics, ideally, knowledge of electronics, Python and FPGA (VHDL) programming, interest in working with experts on a cross-institute collaboration project, very good written and spoken English language
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hardware design and verification (HDL: VHDL/Verilog, simulation tools). · Hands-on experience with FPGA prototyping or hardware/software co-design is highly desirable. · Good communication
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optics, ideally, knowledge of electronics, Python and FPGA (VHDL) programming, interest in working with experts on a cross-institute collaboration project, very good written and spoken English language
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topics. Candidates should have some experience working with FPGAs as well as an understanding of computer networks. Experience with both RTL and HLS design is favoured. The ideal candidate would have some
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work within the ADAPTING PEPR project, funded by France 2030 and led by the ANR (French National Research Agency). Within this project, the ASIC team at IETR aims to develop a distributed platform for
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software and hardware (knowledge on working with FPGAs and ASICs will be preferred). Achievement of the expected progression within Post Doc and Senior Post Doc is transferable between the Irish HEI’s
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will be involved in crafting and applying high-accuracy algorithms for a Spiking Neural Network (SNN) processing unit, to be executed on FPGA and ASIC. As a Postdoc, your key responsibilities will be
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. During the project, these modules will be emulated by RF FPGA boards designed at the beginning of the project. The first objective of the project will therefore be to propose a very low cost wireless link
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Postdoctoral Scholar to join the team. The focus of this role is to contribute to the rapidly evolving quantum computing technologies by developing the FPGA based control systems for a wide range of advanced