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accelerator applications, especially storage ring lattice and orbit control. Proficient in RTL design (Verilog/SystemVerilog/VHDL), IP integration, simulation, timing closure, and FPGA deployment. Skilled in C
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for control system interfaces. As part of a team, develop FPGA-based control systems to support AQT experimental operations. Support gateware development for FPGA-based systems, ensuring proper integration and
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fast-moving field, the SEA will work at the forefront of quantum computing technologies, developing Field Programmable Gate Array (FPGA)-based control systems for a range of advanced qubit platforms
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PLCs, FPGAs, and EPICS into next-generation accelerator systems. Your work will help shape the future of safety engineering at Berkeley Lab and beyond, with opportunities to collaborate across DOE labs