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                Field
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                The Application Specific Intelligent Computing (ASIC) Lab at USC’s Information Sciences Institute (USC’s ISI) invites applications for a post-doctoral position in Silicon Photonics, with a focus on 
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                diseño y verificación con FPGAs. Experiencia demostrable en el diseño de sistema empotrados de alto rendimiento para aplicaciones de aprendizaje automático (ML/DL) aplicado a imágenes. Experiencia 
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                Specific Intelligent Computing (ASIC) Lab at USCs Information Sciences Institute (USCs ISI) invites applications for a post-doctoral position in Silicon Photonics, with a focus on advanced computing 
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                -healthcare technologies•Security and privacy in computing systems and IoT•Intelligent wireless communications and networks•Systems-on-chip, FPGA/microcontroller design, real-time systems•Biomedical 
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                optimized code written by expert programmers and can target different hardware architectures (multicore, GPUs, FPGAs, and distributed machines). In order to have the best performance (fastest execution 
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                platforms, including embedded and edge computing environments (e.g., Jetson, Raspberry Pi, FPGA, neuromorphic chips) Publish results in top-tier journals and present at leading international conferences and 
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                significant prior experience of: power semiconductor switching converters such as oscilloscopes programming MicroSemi FPGAs in the Libero environment low level programming of embedded C++ in Infineon Tricore 
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                Reconfigurable/Spatial computing architectures, such as FPGAs, CGRAs, and AI accelerators, offer significant opportunities for improving performance and energy efficiency compared to traditional CPUs 
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                architectures Support lab activities related to designing and optimizing AI implementations across various platforms, including embedded and edge computing environments (e.g., Jetson, Raspberry Pi, FPGA 
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                (e.g., hardware trojans, side-channel exposure). Co-develop testbenches for hardware simulations and chiplet-level threat modelling. Collaborate closely with FPGA and IC prototyping teams to deploy AI