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physics (HEP) detectors, neuromorphic computing, FPGA/ASIC design, and machine learning for edge processing. The successful candidate will work with a multi-institutional and multi-disciplinary team
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Qualifications Master’s of Science in Electrical or Computer Engineering. 12 years of experience in digital or system architecture for SoC/FPGA/ASIC designs, with strong exposure to AI, networking, or HPC
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