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research along the entire semiconductor value chain and on tailor-made synthetic diamonds. Whether high-frequency circuits for communications technology, voltage converter modules for electromobility, laser
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RTL design for digital blocks, including design, synthesis, and timing closure Work independently in various phases of the RTL-to-GDS flow: focusing on hierarchical floor planning placement, clock tree
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, including digital, physical, and mixed-signal designers Prepare technical reports for internal and external partners Write research papers for journals and conferences What you bring to the table Completed
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including digital design, systems and mixed-signal design What you bring to the table Completed scientific university studies in the field of electrical engineering, electronics, communication engineering
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of embedded machine learning, neuromorphic hardware and deep learning accelerators. Want to get more information? Click here. What you will do Responsible for RTL design (VHDL, Verilog) of digital blocks and
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peripheral circuits, including sense amplifiers, decoders, and voltage shifters Create CMOS layouts for memory arrays and peripheral circuits Collaborate with the digital design team on memory controller and
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experience in analog design flow and in the use of Cadence design tools Initial know-how in digital and mixed-signal design flow is an advantage Strong communication skills, open personality and good German
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: Carl Friedrich von Siemens Foundation (Carl Friedrich von Siemens Award ) Carl Zeiss Foundation (Carl-Zeiss-Humboldt Research Award ) Fraunhofer-Gesellschaft (Fraunhofer-Bessel Research Award ) Fritz