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19 Dec 2025 Job Information Organisation/Company University of Split, Faculty of civil engineering, architecture and geodesy Department Department of Concrete Structures and Bridges Research Field
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About the Opportunity About the Opportunity: The School of Architecture in the College of Arts, Media and Design (CAMD) at Northeastern University invites applications for an open-rank tenured
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23 Dec 2025 Job Information Organisation/Company ETH Zürich Research Field Architecture » Other Researcher Profile Recognised Researcher (R2) Country Switzerland Application Deadline 19 Mar 2026
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an opportunity to gain experience in teaching a specialized course in English to Chinese students in the Landscape Architecture program. The FAFU International College is a relatively new collaboration between
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hardware architectures (multicore, GPUs, FPGAs, and distributed machines). In order to have the best performance (fastest execution) for a given Tiramisu program, many code optimizations should be applied
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Your Job: Investigate the potential of novel computing architectures for lattice field theory workloads Contribute to the design and implementation of an open-source lattice field theory framework
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20 Dec 2025 Job Information Organisation/Company UNIVERSITY OF MACAU Research Field Architecture Researcher Profile Recognised Researcher (R2) First Stage Researcher (R1) Country Macao Application
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20 Dec 2025 Job Information Organisation/Company Eindhoven University of Technology (TU/e) Research Field Computer science » Computer architecture Computer science » Computer hardware Researcher
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University of North Carolina at Charlotte | Charlotte, North Carolina | United States | about 4 hours ago
Position Information General Information Position Number 004008 Working Title Lecturer in Design & Practice Classification Title 9-Mo Non-Tenure Track Faculty College Col of Arts & Architecture (Col
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on design of mixed-signal circuits. - Valuable Knowledge of comercial design tools like Cadence / Synopsys. - Competence in computer architectures and digital system design with HDLs (Verilog or VHDL