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. The system will include: A very compact, ultra-low-power analog front-end (AFE) to sense neural signals. An on-chip neuromorphic processor to convert the neural data into spike-based encoded data and
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Neural Networks (SSM-SNNs). The project includes the co-design and integration of a RISC-V processor for hybrid neuromorphic computing. The research aims to develop ultra-low-power computing chips
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in functional genomics methods (e.g., single-cell and bulk RNA-seq, ATAC-seq and ChIP-seq) and computational data analysis is considered highly advantageous. Selected references: Jakobsen et al., 2024
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include: CMOS-based neuron and synapse circuit design Low-power digital architecture for SNN processing On-chip learning mechanisms Integration with sensor interfaces for biomedical signal processing What
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below). Hands-on experience with layout and tape-out of CMOS chips. For further information, please contact Professor Farshad Moradi, moradi@sdu.dk , Associate Professor Milad Zamani mzamani@sdu.dk