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. Nice to have: Practical experience with machine-learning frameworks (e.g., PyTorch). Prior tape-out experience (ASIC or a complex FPGA prototype) and familiarity with the digital back-end flow (synthesis
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network capable of both inference and learning, aiming at investigating candidate architectures for ASIC design in a longer-term future beyond the scope of this PhD work. Thesis objectives As part of
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into the co-design of ultra-low-power AI hardware architectures tailored for edge computing applications. The research aims to develop neuromorphic processors, FPGA/ASIC-based AI accelerators, and intelligent
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, Computer Science, or related field with excellent grades. Sound knowledge of computer hardware design and synthesis tools (ASIC, FPGA). Good programming and scripting skills. Excellent English communication
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synthesis tools (ASIC, FPGA). Good programming and scripting skills. Excellent English communication, presentation, and writing skills. Must be a team player. Knowledge of computing-in-memory is an added
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design and synthesis tools (ASIC, FPGA). Good programming and scripting skills. Excellent English communication, presentation, and writing skills. Must be a team player. Knowledge of computing-in-memory is
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experience of ASICS and electronics Good language skills, in particular a good command of both written and spoken English. Desired qualifications: Experience with manufacturing and quality assurance systems
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energy-efficient CMOS blocks implementing SSM-based LLMs. Prototype hardware blocks on FPGA and prepare for ASIC tape-out. Benchmark performance and comparison with transformer accelerators. Work with