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                platform as a doctoral student? At Fraunhofer IPMS , in collaboration with renowned German and European partners from science and industry, we are developing analog accelerators using novel non-volatile 
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                Join TU Delft and work together with NXP to build low-power AI accelerators for self-healing analog/RF calibration, fixing noise/offset. Co-design algorithms & hardware and validate on real silicon 
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                platform as a doctoral student? At Fraunhofer IPMS , in collaboration with renowned German and European partners from science and industry, we are developing analog accelerators using novel non-volatile 
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                for intelligent brain-computer interfaces? We are offering a PhD position in analog/mixed-signal CMOS circuit design for EEG and wearable sensor interfaces, as part of a pioneering project focused on assistive 
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                transceiver front-ends, addressing key design challenges through a comprehensive multi-domain approach spanning antenna, analog/RF, and digital domains. The expected outcome is a novel co-design strategy 
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                FieldEngineering » Electrical engineeringEducation LevelMaster Degree or equivalent Skills/Qualifications Good use of Cadence Specific Requirements Analog circuit design Subthreshold analog circuit knowledge 
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                funds under the 2023.11981.PEX project reference. Scientific Area: Basic Sciences and Enabling Technologies Group: Integrated Circuits - Lx Work Objectives: This work plan addresses the problem of analog 
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                of IC design with a focus on new architectures of CMOS backplanes. What you will do Developing, implementing and experimentally testing concepts for CMOS backplanes for OLED microdisplays Designing analog 
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                essentially corresponding knowledge in another way. The applicant is expected to meet the following requirements: Deep technical documented proficiency in analog, RF, and mixed-signal IC design using advanced 
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                . The applicant is expected to meet the following requirements: Deep technical documented proficiency in analog, RF, and mixed-signal IC design using advanced CMOS technologies. Well-versed in the end-to-end design