PhD position on Vertical GaN MOS structures with semi-insulating channel for high-power switches

1 Apr 2026
Job Information

Organisation/Company

Institute of Electrical Engineering, Slovak Academy of Sciences

Research Field

Physics » Solid state physics

Researcher Profile

First Stage Researcher (R1)

Positions

PhD Positions

Application Deadline

30 Apr 2026 - 23:59 (Europe/Bratislava)

Country

Slovakia

Type of Contract

Temporary

Job Status

Full-time

Hours Per Week

37.5

Offer Starting Date

1 Sep 2026

Is the job funded through the EU Research Framework Programme?

Not funded by a EU programme

Is the Job related to staff position within a Research Infrastructure?

No

Offer Description

Semi-insulating vertical GaN devices are a class of power semiconductor devices that utilize Gallium Nitride (GaN) material in a vertical configuration, offering significant advantages for high-voltage, high-current, and high-frequency applications. The semi-insulating GaN layer helps to reduce parasitic capacitance, mitigate leakage currents, and improve breakdown voltage, making these devices highly suitable for power electronics, RF amplifiers, and motor drives. By incorporating vertical structures, these devices achieve high current handling capabilities while maintaining efficient thermal management. The combination of GaN’s wide bandgap, high electron mobility, and semi-insulating properties results in improved performance, making vertical GaN devices an ideal choice for next-generation power systems. In vertical devices, it’s crucial to ensure uniform current flow across the entire device area. Structural modifications like current spreaders, channel regrowth or optimized electrode designs help mitigate current crowding effects, improving the channel's performance. In addition, the channel regrowth process also enhances the interface quality between the gate and the GaN material, which is critical for device reliability and performance. A vertical MOS structure on Gallium Nitride (GaN) through channel regrowth is an advanced approach to fabricating high-performance electronic devices. This method involves regrowing a semiconductor layer to form a high-quality gate channel, typically using selective epitaxial growth. The configuration of the semi-insulating vertical GaN transistor designed by us is patented within the Slovak Republic; EU patent pending. 

The main aims of the disertation thesis will be an understanding of the basic principles of the GaN vertical structures. Electrical characterization of vertical GaN devices involves assessing key parameters such as breakdown voltage, current-voltage characteristics, capacitance, and on-resistance. These metrics provide insights into the device’s performance under different operational conditions. High breakdown voltages and low on-resistances are particularly critical for optimizing device efficiency and minimizing energy losses. Mechanisms of failure, including thermal stress, gate oxide breakdown, and defect-related degradation will be also analysed.

Please submit applications to elusav@savba.sk . For further information about the scientific content please contact the supervisor: Dr. Roman Stoklas roman.stoklas@savba.sk  

 

Where to apply

E-mail

elusav@savba.sk

Requirements

Research Field

Physics

Education Level

Master Degree or equivalent

Additional Information
Benefits

International community of young scientists (PhD, postdocs).

Participation at international conferences and workshops.

Unique research facilities.

Trainings and development possibilities (seminars, workshops, conferences).

Flexible working hours.

Cheap accommodation in campus.

8 weeks of holidays per year.

Eligibility criteria

Graduated MSc with diploma

Selection process

The Institute of Electrical Engineering SAS is an external education institution, performing PhD studies in cooperation with the Slovak University of Technology, Faculty of Electrical Engineering and Information Technology, Bratislava and Comenius University, Faculty of Mathematics, Physics and Informatics.

In the first round, the CVs will be assessed, in the second round, short-listed candidates complying with the requirements will be invited for personal or online interviews in May-June 2026. PhD study starts in September 2026.

Applicants should provide the following information in their application:

1. Cover Letter.

2. A detailed CV including technical and analytical skills.

3. List of publications.

4. Copy of MSc diploma.

5. Abstract of the BSc and MSc thesis if applicable, or any previous research project.

6. Contact details of two referees who can provide reference letters. 

Additional comments

4 year funded PhD position - PhD students receive a monthly scholarship of 1 174,50 EUR and after midterm exam 1 367,50 EUR. The scholarship is not subject to taxation or mandatory insurance contributions. Additional funds are are also available (part-time contract at the institute + bonuses from working on a research project).

Work Location(s)

Number of offers available

1

Company/Institute

Institute of Electrical Engineering, Slovak Academy of Sciences

Country

Slovakia

City

Bratislava

Postal Code

84104

Street

Dubravska cesta 9

Geofield

Contact

State/Province

Bratislava

City

Bratislava

Website

http://www.elu.sav.sk/

Street

Dubravska cesta 9

Postal Code

84104

STATUS: EXPIRED

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